Passive Switched Capacitor RF Front Ends for Spectrum Sensing in Cognitive Radios

This paper explores passive switched capacitor based RF receiver front ends for spectrum sensing. Wideband spectrum sensors remain the most challenging block in the software defined radio hardware design. The use of passive switched capacitors provides a very low power signal conditioning front end that enables parallel digitization and software control and cognitive capabilities in the digital domain. In this paper, existing architectures are reviewed followed by a discussion of high speed passive switched capacitor designs. A passive analog FFT front end design is presented as an example analog conditioning circuit. Design methodology, modeling, and optimization techniques are outlined. Measurements are presented demonstrating a 5 GHz broadband front end that consumes only 4 mW power

A Low-Power CMOS VGA for 50Mb/s Disk Drive Read Channels

We describe an all CMOS variable gain amplifier (VGA) suitable for use in disk drive read channels. The VGA maintains a 3dB bandwidth greater than 85 MHz throughout its gain range. This ensures good phase linearity for data transfer rates of up to 50Mb/s. The VGA provides a 25dB gain variation along an ideal exponential gain to control voltage curve and 30dB of gain control if ideal exponential characteristics is not absolutely necessary. The VGA achieves the necessary exponential gain to control voltage characteristics intrinsically using only MOS transistors as a single unit to reduce power and area consumption. Overall power consumption is less than 10mW for the VGA circuit excluding the off-chip buffer circuits. 1 Introduction The desire for smaller disk drives with reduced power consumption increases the need to integrate the read channel electronics into a single mixed-signal CMOS chip or a set of chips. Variable gain amplifiers (VGA) form an important component of the read ch..

Feasibility and Performance Region Modeling of Analog and Digital Circuits

Hierarchy plays a significant role in the design of digital and analog circuits. At each level of the hierarchy it becomes essential to evaluate if a sub-block design is feasible and if so which design style is the best candidate for the particular problem. This paper proposes a general methodology for evaluating the feasibility and the performance of sub-blocks at all levels of the hierarchy. A vertical binary search technique is used to generate the feasibility macromodel and a layered volume-slicing methodology with radial basis functions is used to generate the performance macromodel. Macromodels have been developed and verified for both analog and digital blocks. Analog macromodels have been developed at three different levels of hierarchy (current mirror, opamp, and A/D converter). The impact of different fabrication processes on the performance of analog circuits have also been explored. Though the modeling technique has been fine tuned to handle analog circuits the approach is ..

High performance multi-channel high-speed I/O circuits

This book describes design techniques that can be used to mitigate crosstalk in high-speed I/O circuits. The focus of the book is in developing compact and low power integrated circuits for crosstalk cancellation, inter-symbol interference (ISI) mitigation and improved bit error rates (BER) at higher speeds. This book is one of the first to discuss in detail the problem of crosstalk and ISI mitigation encountered as data rates have continued beyond 10Gb/s. Readers will learn to avoid the data performance cliff, with circuits and design techniques described for novel, low power crosstalk cance

Quadrature frequency generation for wideband wireless applications

This book describes design techniques for wideband quadrature LO generation for software defined radio transceivers, with frequencies spanning 4GHz to around 80GHz. The authors discuss several techniques that can be used to reduce the cost and/or power consumption of one of the key components of the RF front-end, the quadrature local oscillator.  The discussion includes simple and useful insights into quadrature VCOs, along with numerous examples of practical techniques. ·         Provides a thorough survey of  quadrature LO generation; ·         Offers an intuitive explanation of the different quadrature VCO architectures, and categorization of these architectures based on the intuitive explanations; ·         Describes a new technique for simultaneous quadrature LO generation for channelized receivers; ·         Includes simple and detailed explanation of two new quadrature VCO techniques that improve phase-noise performance of QVCOs, while providing a large tuning range